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Misbehaving gpio pins

DA1469x

8 months ago

Posted by jagath52 75 points 3 replies
0 upvotes

Hello

I am using Da1469x MCU and social distancing project with Wira SDK 10.440.8.6 for our custom board.

Board has LCD with SPI communication and Pixart with I2C communication.

1. In custom board ST7735 LCD spi pins and their control pins are connected to P0_0 to P0_3. The problem is SPI communication is not happening in P0_1(MOSI) and P0_2 (SCLK).

2. If we connect only MOSI and SCLK pins to other gpio pins LCD is working fine only in battery, but if device connects to charge then lcd is misbehaving and not working properly.

 

3. Pixart needs one GPIO interrupt to run its algorithm.
If pixart interrupt is connected to GPIO P0_5 and P1_5 then fine pixart working properly, but

If the other gpio is connected to such as p0_17 then i am getting continuous interrupt where algorithm won't run properly. 

 

Thank you
Jagath

8 months ago

PM_Dialog

Hi Jagath,

1.       Please check note 5 (page 62) from the DA1469x Datasheet . P0_00 … P0_05 pins can only be used as a GPIO in 1.8V since it is a QSPI type of pad.  This is documented in AN-B-066: Hardware Design Guidelines too. These pins can be used at 1.8 V (V18P) only, cannot be used at 3 V. These six GPIOs have pull-up and pull-down resistors with a value of 40 KΩ.  So, are you using these pins at 1.8V or 3V ?

2.       Can you please indicate which GPIOs?

3.       Please check the AN-N-066. According to the document, there is the reduced driving strength (RDS) functionality on 13 pins (Table 9). The GPIOs and strength can be accessed/modified from register PAD_WEAK_CTRL_REG (0x50020B00). These pins are available for both packages. This mode should be coupled with the selection of the V18P supply rail for these pins. When selecting the V30 rail as supply, the RDS functionality is not supported. P0_17 indicates the start/end of the XTAL settling process.

Thanks, PM_Dialog

8 months ago

jagath52 75 points

Hello PM_dialog

 

I am using P017 gpio,

How to change the gpio strength and how to modify PAD_WEAK_CTRL_REG (0x50020B00) 

 

Thank you
Jagath

8 months ago

PM_Dialog

Hi Jagath,

Please see Table 702: PAD_WEAK_CTRL_REG (0x50020B00) in the datasheet. You could try to set the PAD_WEAK_CTRL_REG[P0_17_LOWDRV] to 0. 

Thanks, PM_Dialog