A: The DataFlash ships with a DEFAULT page size of 264 or 528 Bytes. To configure the Dataflash in the Binary mode (256 / 512 Byte pages) please refer to the following steps at power up:
- Power up.
- Read the Status Register byte 1, bit 0.
- If this bit is 1 then all is good so start running.
- If this bit is 0 then the device is configured for 264 byte page size.
- Send the command 0x3D, 0x2A, 0x80, 0xA6 to change it to a ‘Binary’ page size.
- Start running . This should only need to be done once at first power up. and allows you to fit 2B and non 2B parts with no changes.
A: Visit our Simulation Tools page.
A: Visit the Programmer Support page
A: This indicates the product is binary page size. Please refer to the product datasheet for specifics regarding the binary page size.
A: This indicates the product is shipped in Tape and Reel.
A: There are three ways to program the serial flash device: 1) Byte by byte, 2) Page program, and 3) Sequential program.
- Byte programming requires the Command Code, plus three address bytes and then the data byte. When Chip select goes high the byte is programmed to the memory. To program the next byte this sequence is repeated. Command, 3 x Addr, 1 x Data.
- Page Programing is similar to Byte programming but instead of de-selecting chip select signal when the first data byte is loaded and then waiting for the device to program that data, you can keep CS low and continue to clock in up to 256 bytes into the buffer. Then, when CS goes high, all 256 Bytes will be programmed to sequential address locations from the address location specified at the start of the command. This can only be a maximum of 256 Bytes (which is the size of the on-chip sram buffer). Command, 3 x Addr, 1 x Data, 1 x Data, 1 x Data ~~~~~~ 1 x Data.
- The Sequential program mode is the same as Byte program but uses an internal address counter to keep track of the last address used. This means that the user only needs to load the address of the first data bytes, and once that is programmed they can send the ADh or AFh command and the next data byte (without needing to send the 3 address bytes again). Although the device still has to wait whilst each data byte is programmed, the fact that you do not need to keep sending address information makes the whole process a little quicker. Command, 3 x Address, 1 x Data (Wait for program cycle), Command, 1 x Data (Wait), Command, 1 x Data (Wait), etc.
In all cases, the address location that is to be programmed, whether by Byte programming, page programming or sequential programming MUST be erased first. On the Adesto Fusion memories, you can use page erase (256byte pages) or 4Kbyte, 32Kbyte and 64Kbyte BLOCK erase.
A: CPOL and CPHA define the clock modes. CPOL indicates the idle level for SCK (0 for idle low, 1 for idle high). CPHA indicates the clock phase. Adesto devices operate in mode-0 (CPOL=0, CPHA=0) and in mode-3 (CPOL=1, CPHA=1).