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AN-CM-240 Extending the SLG59M1693C’s Maximum Operating Current Range

Contents

References

  1. SLG59M1693C, Datasheet, Dialog Semiconductor

Author: Andrii Hrypa and Petro Zeykan

Introduction

Some applications require a Load Switch to deliver currents higher than 1 A. One way to address this requirement is to use a load switch with higher current capability. However, such a part may occupy more PCB area or consume more power than optimal for the desired current rating. Another way to obtain higher current capability is to parallel two load switches.

Using Two SLG59M1693Cs in Parallel

Parallel arrangement (Figure 1) divides the current between each GreenFET load switch accordingly to its RDSON.

Figure 1: Schematic Layout of Connecting Two SLG59M1693C Load Switches in Parallel

Using two load switches in parallel lowers the overall RDSON while maintaining low current consumption when ON, for any applications up to 2 A. A typical RDSON vs. Temperature and VIN for this configuration is illustrated in Figure 2.

Figure 2: RDSON vs. Temperature and VIN

All PCB traces have the elements of resistance, capacitance and inductance. If there were a difference in path length from the voltage source to the GreenFET load switches pads, this delta trace length would create a current imbalance. In this case, the PCB layout should be designed properly to minimize parasitic impedance and especially parasitic inductance on VIN and VOUT pins. Excess trace inductance may cause a delay effect during on/off operation. Figure 3 shows a recommended PCB layout for applications using two SLG59M1693Cs in parallel.

Figure 3: PCB Layout for Using SLG59M1693C in Parallel

Typical operational waveforms of this two load switches solution are illustrated in Figure 4 and Figure 5.

Figure 4: Turn on Operation Waveform for VIN = 2 V, CLOAD = 0.1 µF, RLOAD = 1 Ω
Figure 5: Turn on Operation Waveform for VIN = 0.8 V, CLOAD = 0.1 µF, RLOAD = 0.4 Ω

Conclusions

Using SLG59M1693Cs in parallel lowers the overall RDSON, but current consumption when on still remains low. The difference in path length from the voltage source to the GreenFET Load Switches pads may create a current imbalance, so the recommended PCB layout is presented.