SLG46120

10-GPIO, 2 ACMPs, 16 LUTs (max.), 4 CNT/DLY (max.), 8 DFF/LATCH (max.) and other Macrocells

The SLG46120 provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the macrocells of the SLG46120. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit.

Two Analog Comparators (ACMP);

Voltage References (Vref);

Five Combinatorial Look Up Tables (LUTs):

• One 2-bit LUT;
• Four 3-bit LUTs;

Twelve Combination Function Macro cell:

• Four Selectable DFF/Latch or 2-bit LUTs;
• Four Selectable DFF/Latch or 3-bit LUTs;
• One Selectable Pipe Delay or 3-bit LUT:
  • Pipe Delay - 8 stage / 2 output;
• One Bandgap;
• Two Selectable Counter/Delay or 4-bit LUT;
• One Programmable Delay / Deglitch Filter;

Two Counter / Delay Generators (CNT/DLY):

• One 8-bit counter/delay;
• One 14-bit counter/delay with external clock/reset;

Eight D Flip-Flop / Latches (DFF) (Part of Combination Function Macrocell);

Pipe Delay - 8 stage/2 output (Part of Combination Function Macrocell);

RC Oscillator (RC OSC);

Power-On-Reset (POR).

Logic & Mixed Signal Circuits

Highly Versatile Macrocells

1.8V (±5%) to 5V (±10%) Supply

Operating Temperature Range: -40°C to 85°C

RoHS Compliant / Halogen-Free

Pb-Free 12-pin STQFN

Personal Computers and Servers

PC Peripherals

Consumer Electronics

Data Communications Equipment

Handheld and Portable Electronics

SLG46120V: STQFN-12 (1.6 x 1.6 x 0.55 mm, 0.4 mm pitch)

SLG46120P: STQFN-12 (2.0 x 2.0 x 0.55 mm, 0.5 mm pitch)

The product ID suffix indicates the package style.