SLG46127

Dual 44 mΩ / 2 A P-FET, 6-GPIO, 2 ACMPs, 10 LUTs (max.), 4 CNT/DLY (max.), 4 DFF/LATCH (max.) and other Macrocells

The SLG46127 provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the macro cells of the SLG46127. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit.

Two Analog Comparators (ACMP);

Four Combinatorial Look Up Tables (LUTs):

• Two 2-bit LUTs;
• Two 3-bit LUTs;

Six Combination Function Macro cell:

• Two Selectable DFF/Latch or 2-bit LUTs;
• Two Selectable DFF/Latch or 3-bit LUTs;
• One Selectable Pipe Delay or 3-bit LUT:
  • Pipe Delay – 8 stage / 2 output;
• One Selectable Counter/Delay or 4-bit LUT;

Three Counter / Delay Generators (CNT/DLY) :

• Three 8-bit counter/delays with external clock/reset;

Programmable Delay;

One Logic Function – 1 Deglitch Filter;

RC Oscillator (RC OSC);

Power On Reset (POR);

P-FET Power Switch:

• Power Switch IDS: 2 A;
• VIN: 1.71 V to 5.5 V;
• Low R_DSON:
  • 44 mΩ @ 5.0 V;
  • 58 mΩ @ 3.3 V;
  • 110 mΩ @ 1.8 V;

Logic & Mixed Signal Circuits

Highly Versatile Macro Cells

Read Back Protection (Read Lock)

1.8V (±5%) to 5V (±10%) Supply

Operating Temperature Range -40 °C to 85 °C

Dual 44 mΩ, 2 A P-Channel MOSFETs

Pb-Free / Halogen-Free / RoHS compliant

Power Sequencing with Complex Analog Control

Power Plane Component Size Reduction Project

LED Driver

Haptic Motor Driver

System RESET with Power Switch

SLG46127M: MSTQFN-16 (1.6 x 2.0 x 0.55 mm, 0.4 mm pitch)

The product ID suffix indicates the package style.