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SLG46827-A

Automotive GreenPAK™ Programmable Mixed-signal Matrix with In-System Programmability

SLG46827-A Block Diagram

17-GPIO, 4 ACMPs, I2C, 19 LUTs (max.), 8 CNT/DLY (max.), 17 DFF/LATCH (max.) and other Macrocells

The SLG46827-A provides a small, low power component for commonly used mixed-signal functions. The user creates the circuit design by programming the multiple time Non-Volatile Memory (NVM) to configure the interconnect logic, the IOs and the macrocells of the SLG46826. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit.

Lifecycle status

● Active

Macrocells Overview

Two High Speed General Purpose Rail-to-Rail Analog Comparators (ACMPxH);

Two Low Power General Purpose Rail-to-Rail Analog Comparators (ACMPxL);

Two Voltage References (Vref)

  • Two Vref Outputs; 

Eleven Combination Function Macrocells:

  • Three Selectable DFF/Latch or 2-bit LUTs;
  • One Selectable Programmable Pattern Generator or 2-bit LUT;
  • Six Selectable DFF/Latch or 3-bit LUTs;
  • One Selectable Pipe Delay or Ripple Counter or 3-bit LUT;

Eight Multi-Function Macrocells:

  • Seven Selectable DFF/Latch or 3-bit LUTs + 8-bit Delay/Counters;
  • One Selectable DFF/Latch or 4-bit LUT + 16-bit Delay/Counter;

Serial Communications:

  • I2C Protocol Interface;

Programmable Delay with Edge Detector Output;

Deglitch Filter with Edge Detector;

Three Oscillators (OSC):

  • 2.048 kHz Oscillator;
  • 2.048 MHz Oscillator;
  • 25 MHz Oscillator;

Analog Temperature Sensor;

Power On Reset (POR).

Features

In-System-Debug Feature

Multiple Time Programmable Memory In Development

Wide Range Power Supply

  • 2.5 V (±8%) to 5 V (±10%) VDD 
  • 1.8 V (±5%) to 5 V (±10%) VDD2 (VDD2 ≤ VDD

RoHS Compliant / Halogen-Free

AEC-Q100 Grade 2

Applications

In-Vehicle Navigation

Infotainment

Advanced Driver Assistance Systems (ADAS)

Automotive Display Clusters

Body Electronics

Packages and Ordering

SLG46827-AG: TSSOP-20 (6.5 x 6.4 x 1.2 mm, 0.65 mm pitch)

The product ID suffix indicates the package style.

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Datasheets
Name Date Version
SLG46827-A Datasheet (2.54 MB) 24/02/2021 3.2
Errata
Name Date Version
SLG46827-A Errata (520.65 KB) 31/03/2021 1.2
User guides and manuals
Name Date Version
GSD Quick Start Guide (181.06 KB) 23/10/2020 1.0
RoHS and Reach
Name Date Version
Dialog Environmental Statement for IC Products (1.06 MB)
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GreenPAK Configurable Mixed-signal IC Introduction

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GreenPAK Designer Software

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GreenPAK Development Platform

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Choosing the Right GreenPAK

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GreenPAK I2C

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GreenPAK SPICE Introduction

View the full list of the GreenPAK videos in our Training Video Library.

This product is available in one package:

SLG46827-AG: TSSOP-20 (6.5 x 6.4 x 1.2 mm, 0.65 mm pitch)


Development board selector

GreenPAK Development Board

Provides full programming, emulation and testing functions for GreenPAK devices. For use with SLG46xxxX-SKT sockets kits.

Working in tandem with the GreenPAK Designer software, GreenPAK Advanced Development Board allows designers to:

  • Program custom samples in minutes
  • Test GreenPAK projects in-circuit
  • Develop using any GreenPAK device
Suitable for:
  • Programming
  • Emulation
  • Signal and Logic Generators
Features:
  • USB interface
  • MacOS, Windows and Linux compatible
  • Programming and Emulation
  • Gated expansion header for connection to external test equipment
  • Integrated signal and logic generators
  • LEDs for visual indication
GreenPAK Advanced Development Board
This item is out of stock.
$99.00
Recommended add-on:
SLG46827AG-SKT
$35.00
DIP

Perfect for breadboarding and fast prototypes.

Working in tandem with the GreenPAK Designer software, GreenPAK DIP Development Board allows designers to:

  • Program custom samples in minutes
  • Test GreenPAK projects in-circuit
Suitable for:
  • Programming
  • Emulation
Features:
  • USB interface
  • MacOS, Windows and Linux compatible
  • Programming and Emulation
  • Gated expansion header for connection to external test equipment
GreenPAK DIP Development Board
$29.99
SLG4DVKISP

GreenPAK Development Board for Serial Debugging and In-System Programmability.

  • Can support serial debugging for all GreenPAK parts with I²C
  • Serial programming for SLG46824, SLG46826, and SLG47004
  • Very helpful in late stages of development when doing debug on-board is easiest
GreenPAK Serial Debugger Board (GSD)
This item is out of stock.
$28.75
GreenPAK Development Board

GreenPAK Advanced Development Board

Provides full programming, emulation and testing functions for GreenPAK devices.
  • Programming
  • Emulation
  • Signal and Logic Generators
GreenPAK Advanced Development Board
This item is out of stock.
$99.00
Recommended add-on:
SLG46116V-SKT
$35.00
DIP

GreenPAK DIP Development Board

Perfect for breadboarding and fast prototypes.

Working in tandem with the GreenPAK Designer software, GreenPAK DIP Development Board allows designers to:

  • Program custom samples in minutes
  • Test GreenPAK projects in-circuit
  • Programming
  • Emulation
GreenPAK DIP Development Board
$29.99
Recommended add-on:
SLG46116V-DIP
$1.25
SLG4DVKISP

GreenPAK Serial Debugger Board (GSD)

GreenPAK Development Board for Serial Debugging and In-System Programmability.

  • Can support serial debugging for all GreenPAK parts with I²C
  • Serial programming for SLG46824, SLG46826, and SLG47004
  • Very helpful in late stages of development when doing debug on-board is easiest
GreenPAK Serial Debugger Board (GSD)
This item is out of stock.
$28.75

Other components

SLG46827-A

Programmable Mixed-signal Matrix. VDD1 = 2.3 to 5.5V VDD2 = 1.71-5.5V. 15-GPIO, 4 ACMP, 11 LUTs, 8 Multi-functional Macrocells, and other Counter/Delay/FF Macrocells. Package: TSSOP-20.

Price table:

Qty 100+
Price $0.60
SLG46827-A (un-programmed)

Note: All parts will be shipped in tape form.

$0.60
SLG46827-A

Programmable Mixed-signal Matrix. VDD1 = 2.3 to 5.5V, VDD2 = 1.71 to 5.5V. 15-GPIO, 4 ACMP, 11 LUTs, 8 Multi-functional Macrocells, and other Counter/Delay/FF Macrocells. Package: TSSOP-20.

SLG46827-A (programmed)

Note: All parts will be shipped in tape form.

$0.60
TSSOP-20n2

Included are: SLG4SA20-65x64 socket adapter, 50 SLG46827A samples.

SLG46827AG-SKT
$35.00
Back to results

GreenPAK and GreenFET

2 months ago

I2C to control pin as GPIO

Posted by devgit 130 points 10 replies
0 upvotes

Hello, I using a SLG46536 to output to I2C to 8 output pins, which leaves a spare input pin and a spare IO pin. I can use I2C to read the spare pins, but can the IO pin be made into a GPIO pin?

I have tried connecting the pins OE and IN to an LUT2, which can be programmed as NOR/OR, but I am not sure if the unconnected LUT inputs are logic 0 or floating? or can the LUT inputs be connected to ground or VDD?

Is this feasible? or is there a better way to do this?

Regards

John.

2 months ago

olehs

Hi devgit, 

Could help me to understand do you want to read the state of input PINs? If yes, then, you can do it using I2C, use register 0xF0, 0xF6, 0xF7 to read the PINs. 

If LUT is unconnected visually to any block it means that it has an internal connection to GND, there is not floating state inside the GreenPAK.

There are several ways, either you can reconfigure the LUT's truth table, or write the connection from LUT to PIN. Using NVM viewer in GPD you can check which bits were changed, hope it will help you to move on. 

Best regards, 

Oleh Sapiha

2 months ago

Hi Oleh,

 

Thanks for your help. I am just looking to make these parts as flexible useful as possible in our design for potential uses or upgrades, so yes reading pins and I have done that sucessfully.

I have connected two LUT to the OE and IN of one unused pin and then changed the LUT truth table to OR or NOR to toggle the pin between output and input, and the output logic level.

But maybe I can just change the output pin function by changing the pin function register, and route VDD/GND to the IN to set the pins logic level. I can see that can be done graphically, so I am currently investigating how that routing works. Do you have any tips on where that information is in the documentation?

 

Regards

 

John.

 

 

2 months ago

Hi Oleh,

 

I think I have this figured out now. But I am concerned that so much is re-configurable by command (including the I2C pins) that there is a possibility that data corruption could accidentally lock out the device from further I2C commands. If the I2C macrocell/pins configution remains entact, then a reset command could be issued. But what if the I2C pins have been reconfigured in error? Is there a way to read only protect just the I2C?

The only way I can see to protect I2C but still allow an LUT to be written, is to choose an LUT (address) that is located in bank 3, and then make banks 0/1/2 read only, although this would not allow any pins to be reconfigured. Would you agree with that?

 

Regards

 

John.

 

 

2 months ago

olehs

Hi devgit, 

You should be careful when using I2C since by rewriting the registers you can change almost anything, even damage the chip. 

If you choose "Locked for write bits <1535:0>" you will be able to write some LUTs as specified in Bank3, but the bank 0-2 be only read.

Best regards, 

Oleh Sapiha

2 months ago

Hi Oleh,

Thanks, that makes sense. Just tried it and it seems to work fine with bank0/1/2 locked.

Just a couple of final queries on this chip :-

On the datasheet for SLG46536 for register E6 1847:1840 it says "16-bit Pattern ID Byte 0 (From NVM): ID[23:16]", but this is only 8 bits? is there an ID Byte 1 to go with this ?

Also, on the GreenPAK Designer (6.27, build 001) the rule checker shows some warning messages I cant understand (see photo.

The warning are correct, as the LUT inputs are not connected (I toggle the truth table by I2C command). But I dont understand the Fail, they are configured as OR on Greenpak Designed and they have valid logic tables.

The "notes" refers to the 2-bit LUTs that are not used anymore in the project (I removed them). So I dont know what "settings different from default" means? (photo shows 2-bit LUTs not selected)

 

Regards

John.

 

Attachment Size
GreenPAK components list.png 15.79 KB
GreenPAK designer rule checker.png 27.65 KB

2 months ago

olehs

devgit, 

The rest bits of Pattern ID corresponds to other service bits like metal hard code, metal revision, base die, and so on. They are internal bits that give the information about the silicon and it is not possible to change them. 

When the component with a non-default setting is hidden from the workspace or present on the workspace but unused, the Rule Checker warns you about that. Reset these blocks by clicking the right button → Reset macrocell → Reset all. In your case, it is not critical, but sometimes the hidden blocks (like counters) can Force On the OSC which leads to increased current consumption. That's why we recommend resetting those blocks to default. Also when the block is unconfigured or has some strange settings the Rule checker can remind you about that. 

 

 

2 months ago

Hi Olehs,

Thanks, I have done that and the warnings have gone.

So, what sort of (incorrect) reconfigure could destroy the chip? Is there anything in the bank 3 that coud be so catastrophic? or do you think it should be safe with just that bank alone as writable?

Regards

John.

 

2 months ago

olehs

devgit, 

It's hard to say which combination changed by I2C can destroy the chip. If you use I2C write command carefully everything must be ok. Just don't write anything to unknown resisters. 

Best regards, 

Oleh Sapiha

 

 

2 months ago

Hi Olehs,

Yes I know what you mean, I am just thinking if the bits going over I2C get corrupted, then its out of our hands what data goes to the Greenpak chip.

But I guess the chance of any random data being destructive is very low. I have set the SDA and SCK for schmitt trigger to make them more noise tolerant, but I wondered why that was not set as default for the I2C lines on this macro?

 

My company Watchgas have asked if you have the data for thermal resistance R(ja) junction to ambient for this chip as this information is not in the data sheet. We need this data for our product compliance as we are in the gas safety industry.

Also, do you have data on the power consumption of the I2C macro cell?

 

Regards

John.

2 months ago

olehs

devgit, 

Taken into account regarding DI with ST. Thanks for the suggestion. 

You are right that there is no info about R(ja) for this chip. You could use R(ja)=99°C/W, it was taken from a chip that has a similar package, so the value should be very close. 

If you go to the DS you'll see that chip quiescent current consumption will be equal 0.45uA at 1.8V VDD, 0.75uA at 3.3V VDD, 1.12uA at 5.0V VDD, including I2C macrocell current consumption.

Best regards, 

Oleh Sapiha