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FC8150: RF + BB SoC for ISDB-T 1-seg

Mobile TV: RF + BB SoC for ISDB-T 1-seg


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The FC8150 chip is a highly integrated device for receiving Integrated Services Digital Broadcasting Terrestrial. FC8150 has all of the performance needed to enable the full range of ISDB-T application. It consists of two main blocks, RF tuner and demodulator.

The RF tuner block is designed for use in Japanese and Brazilian mobile digital TV (ISDB-T single- segment) applications. This part directly converts UHF band signals to a low-IF using a broadband down-converter. It contains LNA, down-conversion mixer, channel selection filter (CSF), and LO distribution network for UHF band.

The demodulator block (OFDM decoder) is part of a receiver for digital terrestrial television broadcast in accordance with the ISDB-T Japanese standard (STD-B31), which has all necessary functions for 1-segment mobile receiving. Designed by our unique synchronization and equalization technologies oriented toward mobile receiving, it gives good performances for high-speed moving applications. It is also suitable for cellular phone usages with its low-power-consumption and ultra- compact package size.


  • Highly integrated digital device for ISDB-T
  • External specification
    • Package
      • 32-leads QFN (0.4mm pin pitches, 4.0mm X 4.0mm X 0.85mm)
      • 48-balls fBGA (0.4mm ball pitches, 0.25mm ball diameter, 3.2mm X 3.2mm X 0.8mm)
      • 34-balls WLCSP (0.35mm ball pitches, 0.1mm ball diameter, 2.3mm X 2.3mm X 0.35mm)
    • Multi clock correspondence :
      • Support Clock(MHz): 16, 16.384, 18, 19.2, 24, 24.576, 26, 27, 27.12, 32, 37.4, 38.4 MHz
      • Recommended Clock(MHz) :16.384, 24.576, 26.0, 32.0
    • Power supply voltage:1.14~1.32V(Core)/ 1.62 ~ 3.63V(I/O)/ 1.14 ~ 1.32V(RF,ADC)
    • Power consumption: 31mW @ Core 1.2V
    • High-speed channel search function
    • Mode, GI automatic detection
    • Automatic frequency synchronization function
    • Automatic timing synchronization function
    • Embedded memory for time de-interleave
    • Enhanced channel estimator by using accurate Doppler frequency measurement
    • ICI canceller for enhancing the mobility performance
    • Enhanced interference rejection technique
    • Advanced demapper
    • Complex low IF and digital PGA technology for simplified analog front-end path
    • Sensitivity : -100 dBm @ QPSK CR=2/3


  • Interface
    • Parallel Host Interface
      • 3-bit control pins, 2-bit address bus and 8-bit data bus
      • 3-bit control pins, 8-bit data bus, it is compatible with Qualcomm QSC/MSM series modem chip.
    • Serial Host Interface
      • SPI: Clock speed is up to Crystal Clock(max. 38.4MHz)
      • I2C : Clock speed is up to 1.2MHz for control
    • MPEG-2 Serial-TS output
      • Various TS clock : Clock speed be controlled from Crystal clock to 1/7 of Crystal clock
    • Interrupt signal output
  • 1-Segment reception (Japanese Standard: ARIB STD-B31)
    • Mode: 1, 2, 3
    • Sub-carrier modulation: QPSK, 16QAM
    • Code rate : QPSK(1/2, 2/3), 16QAM(1/2, 2/3)
    • Frequency De-Interleaving
    • Time De-Interleaving
    • Viterbi decoder
    • Byte De-Interleaving (Forney type convolutional interleaver (I,M)=(12,17))
    • Reed-Solomon decoder (204,188)
    • Supported bandwidth : 6 / 7 / 8 MHz
    • Supported frequency bands
      • UHF:470~806MHz


  • Mobile phone
  • PMP
  • Laptop/USB dongle
  • Navigation

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