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Neuron 6050
Neuron 6050
Open systems IP communication and control processor for LON and BACnet control networks
The Neuron® 6050 processor incorporates communication and control functions on a single chip in both hardware and firmware to facilitate the design of Industrial Internet of Things (IIoT) devices and consolidate smart control networks. The Neuron 6050 features a high-performance Neuron core and is a key product in the IzoT® platform - the most comprehensive and open control networking platform for the IIoT. The device offers compatibility with the large installed base of LON and BACnet MS/TP devices, while adding support for LON/IP and BACnet/IP communication. Combined with external flash memory and communication transceiver, the Neuron 6050 provides a very flexible, low-cost, feature-enhanced LON and BACnet solution, all within the same device with a single application. This unique capability enables two of the most popular industrial protocols to communicate simultaneously over the same media. The Neuron 6050 is designed to deliver unprecedented flexibility and openness while lowering development and device costs in smart buildings and industrial installations.
Features
- Supports worldwide communication standards
- ISO/IEC 14908-1 and 14908-2
- ANSI 709.1 and ANSI 709.3
- EN14908.1
- GB/Z 20177.1-2006
- High performance
- Four independent cores to manage the physical MAC layer, the communication protocol stacks, the user application, and interrupts
- Up to 80MHz system clock
- 64KB RAM and 16KB ROM
- Support for larger external flash memories, up to 256KB applications
- Unique 48-bit IEEE MAC ID
- Support for up to 254 network variables (NVs), 127 aliases and 254 address table entries
- Supported channels via external transceivers (partial list):
- Twisted Pair TP/XF-1250
- Link-Power LPT-11
- RS485
- ISM-RFIR
- HD-PLC
Features
- Peripheral interfaces:
- 5-pin network communications port for external transceivers (3.3V drive and 5V-tolerant pins)
- Serial interface for external EEPROM or flash
- 12 I/O pins with 35 programmable standard I/O modes
- Hardware USART
- Compatible with low-cost surface mount FT-X3 communications transformer
- 3.3V operation (5V tolerant digital I/O)
- Operational temperature range: -40 °C to 85 °C
- 48pin QFN package (7mm x 7mm)
Benefits
- Built-in LON, LON/IP, BACnet/IP, and BACnet MS/TP stacks provide compatibility with millions of LON and BACnet devices and enabling IP access to every Neuron 6050 based device
- A rich set of LonMark and IoT standard profiles and data types further reduce application development time
- Easy migration of existing applications written for previous generation Neuron chips and smart transceivers
- Free and royalty-free IzoT SDKs for simple integration with other processors
- Integrated flash file system for data logging and other applications requiring persistent storage
Resources
Datasheets
- Neuron 6050 Datasheet (2.37 MB)
Brochures
- Brochure: Deliver the Promise of the IoT (3.42 MB)
User guides and manuals
- ISI Programmer's Guide (1.5 MB)
- IzoT BACnet Developer's Guide (830.47 KB)
- IzoT Resource Editor User's Guide (1.34 MB)
- Neuron Assembly Language Reference (2.28 MB)
- Neuron C Programmer's Guide (1.39 MB)
- Neuron C Reference Guide (1.45 MB)
- Neuron Field Compiler User Guide (612.5 KB)
- Neuron Tools Errors Guide (1.29 MB)
General
- Analog-to-Digital Conversion with the Neuron Chip (133.61 KB)
- Connecting a Neuron® 5000 Processor to an External Transceiver (389.19 KB)
- Design Practices for Using a LonWorks Free Topology Channel on Trains (307.8 KB)
- EIA-232C Serial Interfacing with the Neuron Chip (62.42 KB)
- I/O Model Reference for Smart Transceivers and Neuron Chips (1.72 MB)
- ISI Protocol Specification (616.5 KB)
- LonWorks Protocol - File Transfer (94.91 KB)
- Neuron Chip Quadrature Input Function Interface (44.62 KB)
- Parallel I/O Interface to the Neuron Chip (94.76 KB)
- Scanning a Keypad with the Neuron Chip (34.79 KB)
- Series 6000 Chip Databook (2.17 MB)
- Understanding the Neuron® Firmware Address Table (116.21 KB)
- Using SPI and Neurowire I/O Object Models to Interface with Peripherals and Microcontrollers (282.2 KB)
Archives
For technical support or information on how to buy, contact us directly.