Equally important, it allows Dialog to minimise the scope of tests required and the device test time, helping to reduce unit costs. Dialog Semiconductor maintains this test and physical laboratory at Kirchheim, near Stuttgart, Germany.
Where ASIC designs are concerned, it accelerates time-to-market. In one recent example, a consumer ASIC was taken from design concept phase to a production rate of 3 million devices per month in just 9 months. The industry average for this kind of development is around 18 months.
Dialog’s obsession with enhancing product quality comes from its heritage in the automotive industry, where any device that fails has to be analysed until the reason for the fault is established, whether this is due to external factors or a weakness in the device itself. This same thoroughness is now setting the company apart in mobile consumer markets, where reliability may not be a safety critical issue but is essential to protecting valuable brand reputations.
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For small volumes and to support our local automotive customers, who typically have a very long product life cycle, Dialog also provides a limited tape and reel capability from this laboratory.
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Dialog has a dedicated team of software developers that are continuously improving and automating our manufacturing processes by creating smarter or safer interfaces between different types of equipment, including testers, probers, handlers, and operator interfaces.
Dialog’s approach is to build a comprehensive and efficient manufacturing data warehouse, which allows online access to detailed information for all products shipped to our customers. Additionally, we are preserving the electrical test data integrity of each chip that has passed our quality gates. This is essential for tractability and historical product investigation purposes.
Dialog has continued to investments in the Physical Laboratory, empowering the company the ability to enhance pro-actively the quality and reliability of its devices, and to improve manufacturing yields. Although failure analysis is an important matter here, around 80% of the activities are focused on evaluating working devices and looking for ways to continuously improve them. Helping customers to understand the likely performance of components within their operating environment, i.e. soldering onto a substrate, is another important part of the work of Dialog’s physical laboratory.
The starting point for failure analysis is device identification and examination of the history of the part.
Level 1 electrical tests are followed by non-destructive inspection, including X-ray examination and/or acoustic scans. Devices are then de-capsulated, either fully or in part, and inspected visually using optical microscopes. Where the situation requires it, inspection with a scanning electron microscope (SEM) is performed. This gives information about device surface topography, contamination and other properties, such as electrical conductivity. Sample preparation plays an important roll in failure analysis, therefore the laboratory has the ability and necessary equipment to make cross-sections of the packages and silicon chips, as well as performing chemical and mechanical die de-processing.
Advanced, small geometry bond testing includes both wire pull tests and wire-ball shear tests to determine the strength of bonds and ultimate failure mechanisms.
The Physical Laboratory is equipped with ESD and latch-up testing capabilities, which, for example, allow tests to be carried out following the Human Body Model, creating pulses between 50V and 8kV, in accordance with JEDEC standards.
Accelerated ageing can be done at various temperatures (normally 125 degrees Centigrade), having the electrical functionality verified at given time intervals. The standard ageing evaluation is 1000 hours, or some 8 weeks. This enables device performance to be extrapolated out to about 5 years of normal operation, although this can be extended to 17 years using longer test time and/or higher stress temperatures.
A unique drop test for handheld devices (e.g. mobile phones) has been developed at Dialog’s Physical Laboratory in Kirchheim. This determines the quality of solder joints that attach BGA-packaged devices to printed circuit boards. This kind of information is fed back to sub-contract manufacturers enabling them to improve their processes and it is used to assist Dialog’s customers in attaining their own quality goals. Compared to the JEDEC standard, which specifies an acceleration of 1500G, Dialog’s drop test evaluates what happens at accelerations up to 7500G. After being dropped, the package of the device under test is assessed as a measure of soldering quality.
Whilst Dialog Semiconductor has followed the industry trend in outsourcing semiconductor fabrication, device packaging and test, the company has retained a uniquely tight rein on quality and reliability through investment in its own test and Physical Laboratories. In this way, Dialog continues to push the boundaries of device performance and functional density without jeopardizing product reliability. The approach also ensures the fastest possible time-to-market for new devices, and levels of technical support for customers that most fabless chip companies can only dream of attaining.